Issue with CIC filter implementation using DSP builder.

Hi Kaz,

Thanks for your reply. I forgot to put the downsampler over there. I'm updating a new screenshot. I'm getting a dc at the output but with random spikes. I thought of using a PLL as a clock divider to be placed between the integrator and the comb section but it won't allow me to add PLL block. Please have a look at the attachments and kindly suggest something. Thanks a lot.

Note: 1st subplot is the final output