Forum Discussion
Jack_H
New Contributor
1 year agoIssue with Agilex 5 GTS PCIe IP in Quartus v24.3.1
Hi all, I installed Quartus v24.3.1 to test the new SSGDMA changes and enable DMA on our FPGA. However, I couldn’t test the changes in hardware because the new Quartus version seems to have broken t...
- 1 year ago
Hi Jack,
I created a PCIe Gen3x4 PIO example design in Q24.3 then upgraded it to Q24.3.1 without any change. Before full compilation, clicked "Generate HDL" in qsys to make sure nothing wrong. After these, my ubuntu host was able to see the FPGA PCIe.
Regards,
Rong
RongY_altera
Contributor
1 year agoHi,
Based on the ssgdma example user guide, the hardware portion is not supported yet.
Regards,
Rong
Jack_H
New Contributor
1 year agoHi RongYuan,
I was using the PCIE PIO Design example when testing above. It was working in hardware in 24.3 but not working now in 24.3.1.
Best,
Jack