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sbala31's avatar
sbala31
Icon for New Contributor rankNew Contributor
6 years ago

is there any option to change the data width of Avalon interface in ddr3 controller?

our data width requirement is 64 bit but Avalon interface has datawidth of 128 after generating ddr3 controller ip.
NurAida_A_Intel's avatar
NurAida_A_Intel
Icon for Frequent Contributor rankFrequent Contributor
6 years ago

Dear sbala31,

I'm sorry for misunderstood your inquiry at the first place. I thought you wanted to have avalon interface of 64 bits wide.

Unfortunately, the ECC is only available in 16, 24, 40 and 72 bits. If you want to enable ECC, then you need to increase your DDR3 data width to 72 bits or else maintain the DDR3 DQ width to 64 bits without enabling the ECC . This information also covered in the EMIF handbook that I shared in previous thread.

I am truly sorry for the inconvenience caused.

Thanks

Regards,

Aida

  • sbala31's avatar
    sbala31
    Icon for New Contributor rankNew Contributor
    6 years ago

    Hi,

    we have generated 64 bit ddr3 controller softIP(with ECC). for this avalon interface input data width is shown as 128 bit.whether can we change 128 bit to 64 bit datawidth for avalon . so that data processing at avalon interface side will not be complicated.so please suggest if any option is there.