Forum Discussion
Altera_Forum
Honored Contributor
13 years agoSorry, I do not understand your answer.
If you said that the PHY should be placed outside the FPGA, why does the IP core "Triple Speed Ethernet V10.1" contain a PHY module (PCS + PMA) ?Sorry, I do not understand your answer.
If you said that the PHY should be placed outside the FPGA, why does the IP core "Triple Speed Ethernet V10.1" contain a PHY module (PCS + PMA) ?