Dave,
Thanks much for your response!
I should clarify, I already have a GPS device, very similar to the one you suggested, that has an IRIG B, PPS and 10 MHz outputs. The objective is to incorporate a highly precise (<30ns) UTC time into the FPGA for use in network centric application which is implemented in verilog.
I'll say this cautiously, how I *think* this could be done is to create a separate clock/counter on the FPGA that contains a highly accurate UTC time. I envision this clock as having two 32 bit parts. The first or whole part would be an even number of seconds past epoch. The second would be a fractional representation of the current second. In order to do that I know I have to read the IRIG output which gives me the whole portion, and then the PPS when used in conjunction with the FPGA clock should give me the fractional part. I was hoping to get a pointer to an existing IRIG timecode reader, and then get some advice overall on what algorithms would solve this.