Forum Discussion
anat
New Contributor
1 year agoIOPLL output clock issue Stratix10
Hi Team, I configured iopll IP for three output clocks, (outclk0)100MHz, (outclk1)200MHz and (outclk2)600MHz. Ref clock is 100MHz. I see duty cycle variation in the generated clock of 200MHz fro...
RichardT_altera
Super Contributor
1 year agoSignalTap uses a clock to capture the data, so it's dependent on that clock rate. For logic, you want it to be the same clock that drives the logic you're tapping, as you need to synchronously tap it. For probing a clock, I'm not sure exactly what you're hoping to see. Normally people have the clock drive a counter and then just sample that with another clock, to calculate X transitions happened in Y time.
Regards,
Richard Tan