Interfacing with HBM2 on Stratix 10 MX using Reference Design

Hi Justin,

Unfortunately the original developer that created this reference design already left Intel. So, there is no one to continue to look into this reference design project anymore.

The last known good Quartus version that validated the reference design was v19.2. We can't guarantee it will continue to work for newer Quartus version due to unforeseen changes that may appear in both IP design and Quartus software.

If you truely suspect the "AXI bridge" can't integrate well with your design requirement then my advice to you is pls consider to redesign your own bridge to manage the data transaction.

• Most of the time design block in reference design is meant to work for some specific test/demo purpose only and it's not robust to be ported to different design

Thanks.

Regards,

dlim