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jg_UF's avatar
jg_UF
Icon for New Contributor rankNew Contributor
4 years ago

Interfacing with HBM2 on Stratix 10 MX using Reference Design

Hi, This is a follow up to the thread at https://community.intel.com/t5/FPGA-Intellectual-Property/HBM2-interfacing-with-the-PCI-express-hard-IP-STRATIX-10-MX/td-p/1233329/page/2. We are tr...
Deshi_Intel's avatar
Deshi_Intel
Icon for Regular Contributor rankRegular Contributor
4 years ago

Hi Justin,


BoonT_Intel already left Intel. I will be the new support agent helping you out.


FYI... appreciate if you can file new forum thread moving forward instead of going back to post on old forum thread that may not be accessible to Intel support agent anymore.


I noticed you are still using old AN881 reference design compiled with Quartus Pro v18.1. I checked the reference design link and found out it already contains updated version of reference design targeting Quartus Pro v19.2


So, can you try out this latest v19.2 reference design ?


Thanks.


Regards,

dlim


  • jg_UF's avatar
    jg_UF
    Icon for New Contributor rankNew Contributor
    4 years ago

    Hi dlim,

    Thanks for your response. I am recently back from break and have just begun working on this again. I will get back with you shortly.

    Thanks,

    Justin