Forum Discussion
ContributorIntel FFT IP example design available ?
Hi,
As I understand it, you have some inquiries related to Natural and Digit Reverse for the FFT output. At high level, when there is digit reverse at the FFT output, the sequence of the output samples will be re-arranged. The new sequence is determined by reversing each sample's index bits. For further information and better illustration, you can refer to the following link with examples and sample code:
https://www.mathworks.com/help/signal/ref/digitrevorder.html
Hopefully this is helpful. Thank you.
ContributorHi CheePin, nice to @ u, since I see you had answered several FFT IP related questions here.
When checking FFT IP UG : " 3.4.2.3. I/O Order " ,
| Natural order |
| Digit Reverse Order |
I don't understand them very well, Can you give an explaination, and any example of "Natural ordr” / " Digit reverse order " ？ I have some incorrect FFT output in A10 project, so I wantto understand where may introduce error.
Thanks in advance
Regular ContributorHi,
As I understand it, you have some inquiries related to Natural and Digit Reverse for the FFT output. At high level, when there is digit reverse at the FFT output, the sequence of the output samples will be re-arranged. The new sequence is determined by reversing each sample's index bits. For further information and better illustration, you can refer to the following link with examples and sample code:
https://www.mathworks.com/help/signal/ref/digitrevorder.html
Hopefully this is helpful. Thank you.
- JET60200
thanks @
