Forum Discussion
DZuck1
Occasional Contributor
6 years agoIntel DisplayPort Example Project Fails to Generate Simulation (Quartus Pro v19.1/v19.2)
Hi, I am trying to generate the simulation HDL for the Intel DisplayPort example project for the Stratix 10. I am consistently getting the same error message (attached). I have tried changing the n...
Deshi_Intel
Regular Contributor
6 years agoHI,
I just pm you the workaround design fix.
Thanks.
Regards,
dlim
- DZuck16 years ago
Occasional Contributor
Thank you dlim! I am trying it out right now. Does this simulate the clkrec encrypted file?