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ushermark's avatar
ushermark
Icon for New Contributor rankNew Contributor
3 years ago
Solved

Intel Arria 10 with dual-rank UDIMM EMIF

Hello. I am a newbie in developing software for Intel Arria 10 FPGA. I have a PCB with installed FPGA and trying to use EMIF. Unfortunately, I got an error on calibration stage. After some timing...
  • AdzimZM_Altera's avatar
    AdzimZM_Altera
    3 years ago

    Hello Mark,

    I have attached the example design in .qar file below. Please let me know if this design can fit into your board.
    Please share the Report DDR as snapshot below after the compilation process.

AdzimZM_Altera's avatar
AdzimZM_Altera
Icon for Regular Contributor rankRegular Contributor
3 years ago

Hello Mark,

Thank you for sharing the datasheets.

I have checked the EMIF IP setting with the memory datasheets and there are some settings that are not accurate.

I will attach the file that contain the snapshot of the EMIF IP setting.

Please let me know if you have any question.

Regards,
Adzim

ushermark's avatar
ushermark
Icon for New Contributor rankNew Contributor
3 years ago

Hello Adzim,

Unfortunately, EMIF IP configs from your file didn't solve the calibration issue. I will attach the results in another .zip file.