Hi FvM and rbugalho
Sorry for my late reply because my hardware is in my office in the weekend.
FvM is right about the voltage for the small "1". The voltage is 560mv.
About my hardware connection, I'm using ArriaII Gx Dev. Kit.
I use PIN_C1 as SCL and PIN_J1 as SDA to access the EEPROM.
As you can see in the attached pdf about the schematic, PIN_C1 and PIN_J1 are also connected to a LCD as a signal of LCD_DATA and LCD_D_Cn.
(See page 6 for LCD and page 24 for the bank 6A of FPGA)
I'm wondering if the connection causes me this problem...
Now I'm doing a simple experiment for testing these two pins under the same hardware connection.
This experiment generates a clock of 100KHz(clk100k) and controls the scl/sda output enable signals with clk100k. Partial codes are provided as follows:
assign sda = sda_o_en? 1'bz: 1'b0;
assign scl = scl_o_en? 1'bz: 1'b0;
assign sda_o_en = clk100k;
assign scl_o_en = clk100k;
The waveforms of scl and sda are quite good. The period is 10us and there's no small "1".
Now I'm really confused...