How to set up the MSGDMA module, and how and when to create descriptors to be able to write 512 x 32 bit Avalon Streaming data packets to SDRAM in Arria 10 SX?

Hi, I'm trying to achieve the aforementioned transaction in a 10AS066H3F34I2SG device, but I'm experiencing erroneous operation on the f2sdram AXI interface. On the following picture three complete ...