How to make the avalon bus signals for the FIFO from the Quartus IP library? I selected FIFO and went through the wizard box questions so I could set up the type of FIFO I want (16 wide, 2048 deep, dual clk, etc.)

I typed out the code because it's saved on another computer. The .rdfull() was a typo and in my code it is actually written as .wrfull() and I am still getting that error "wrpFifo.sv: cannot connect instance ports both by order and by name." Any other ideas? Thank you!!

PS, is it an issue at all that these two .v and .sv files are in the same project?