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PiotrWo
New Contributor
New ContributorHow to implement PCIE hard IP for Cyclone IV GX
Hi, I am currently working with a Cyclone IV GX FPGA: EP4CGX75CF23C7. I would like to run a PCI transceiver and map the memory (on-chip memory) to the endpoint using 1 data lane. What do I need for ...
Tinker_TimNew Contributor
New ContributorI believe the last version of Quartus II that supports PCIe Hard IP on the Cyclone 4-GX family is V18.1.
I couldn't get later versions to find the IP or allow the Compiler to work.
Hope this helps.
Tink!
