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Altera_Forum
Honored Contributor
Honored ContributorHow to implement DE0 SDRAM as 2-port RAM
I currently use the tiny bit of memory on the FPGA for a computer vision project but it's way too limited. I have a stand-alone SDRAM controller from Altera (partially pasted below) but I need one mo...
Altera_ForumHonored Contributor
Honored ContributorI have Quartus 13.1 since it is the last version that supports the Cyclone III used in the DE0.
Yes, QSYS may have generated one when I told it to generate the simulation or test bench. What am I looking for though? What is the file extension or likely file name? Once I find it, is it just added to a modelsim project like a vhdl file or is there a different import process?
