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Altera_Forum
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10 years ago

How to implement DE0 SDRAM as 2-port RAM

I currently use the tiny bit of memory on the FPGA for a computer vision project but it's way too limited. I have a stand-alone SDRAM controller from Altera (partially pasted below) but I need one mo...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

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I have modelsim 10.1c SE installed and a testbench made but I need a SDRAM simulation model. Any idea what the detailed steps are to get one set up in modelsim?

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Its quite possible that Altera has one for you.

I'm pretty sure that the newer versions of Qsys have an option to create an example testbench design. I've used it with the DDR controller, and that includes a DDR model.

Try and see if that scheme works with SDRAM too. Run the DE0-nano Qsys design and from within Qsys have it generate an example project.

I just tried this with 12.1sp1, and the feature to create an example does not exist in that version. I don't have time to try another version right now, so you should go ahead and see if that feature works for an SDRAM model.

If it does not, you can download models from ISSI or Micron's web site. The ISSI SDRAM is just a clone of some Micron model, you'll just have to find out which. ISSI probably has a "replacement part for Micron" list somewhere.

Cheers,

Dave