Forum Discussion

dsun01's avatar
dsun01
Icon for Contributor rankContributor
4 years ago

how to handle this ip upgrade failure

Hi Dear Support/Expert, I have a TI EVM called TSW14J56, it is a high speed data acquisition board with an Arria V FPGA, I am trying to update the IP to Arria 10 SOC Dev board. I am using a Quar...
sstrell's avatar
sstrell
Icon for Super Contributor rankSuper Contributor
4 years ago

Just open the Platform Designer system (.qsys file) and regenerate the system in the tool, which will create a new .qip file as noted. Make sure the correct target device is selected in both Quartus and in Platform Designer (Device tab in Standard; set based on the connected .qpf file in Pro).

Platform Designer systems, unfortunately, don't work with the auto upgrade feature here in the IP Upgrade tool. You always have to go into Platform Designer and regenerate them.

dsun01's avatar
dsun01
Icon for Contributor rankContributor
4 years ago

Hi sstrell,

thank you for your reply, after I follow your suggestion, I did fixed some issue. but when I click the "dec_512b_fifo.qsys". the following error message pop up. seems it is clear that the Pro version .qsys will not be able to work on a standard edition. I don't think there is a work around until upgrade to a Pro edition.

Error: The system could not be opened: C:\FPGA\18V1_A10\TSW14J56\Altera_JESD204B\jesd204b_refdesign\syn\AVGZ_gen_jesd204b_120_SP2_external_memory\dec_512b_fifo.qsys. "dec_512b_fifo" is a pro system. Please open in Platform Designer in Quartus Pro.