Forum Discussion
Altera_Forum
Honored Contributor
16 years agoYou could open quartus and create a new project with the cyclone II EP2C70 fpga.
then run the wizzard for a new pll and setup plloutput c0 to 100MHz and c1 to 27MHz, now go back and play with the input frequency to see wheter that pll could be implemented or not. the wizzard will tell you that. or, have a look at the cyclone II PLL documentation, you can start with this document http://www.altera.com/literature/hb/cyc2/cyc2_cii5v1_02.pdf (http://www.altera.com/literature/hb/cyc2/cyc2_cii5v1_02.pdf)