Forum Discussion
Jianing1
New Contributor
2 years agoHow to configure the dsp ip core to make a 16-bit 3-input adder with good timing
Hi, I want to use DSP to do the internet checksum offloading. I want to do a+b+c (16 bits) in one clock and I am using Agilex7 AGFB023R25A2E2V. I selected Native Floating Point DSP and configured to...
Kshitij_Intel
Frequent Contributor
2 years agoHi,
Best you use the template available within the Quartus for multiplication and addition. Sharing the screenshot below.
The Maximum frequency of operation depends on the multiple factors and configuration and pipelining and device speed grade and Quartus version as well.
Language Templates
Thank you,
Kshitij Goel