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VBotn's avatar
VBotn
Icon for New Contributor rankNew Contributor
7 years ago

How do I access the Intel® 'Cyclone V GX' DDR3 hard memory controller 'Configuration and Status Interface'?

Is it correct description in documentation (External Memory Interface Handbook Volume 3: Reference Material (Updated for Intel® Quartus® Prime Design Suite: 17.0)) about 'csr_clk' and 'Hard Controll...
Deshi_Intel's avatar
Deshi_Intel
Icon for Regular Contributor rankRegular Contributor
7 years ago

Hi VBotn,

I didn't check the register count in RTL viewer but to be honest "Configuration and Status Interface" is not a popular feature.

I am not sure the reason why you want to use it but you can test it out in simulation first if you really want to exercise this feature. Cyclone V FPGA is a legacy product with minimum support from Intel FPGA. Normally I would recommend customer to migrate to Arria 10 or Cyclone 10 FPGA instead.

Thanks.

Regards,

dlim