How do I access the Intel® 'Cyclone V GX' DDR3 hard memory controller 'Configuration and Status Interface'?

Hi dlim,

I found in documentation (External Memory Interface Handbook Volume 3: Reference Material (Updated for Intel® Quartus® Prime Design Suite: 17.0)) that in the 'Hard memory controller'

signal 'csr_clk' is output clock, which is the same as 'afi_clk'.

But in reality 'MegaWizard' create input signal 'csr_clk'. What are maximum and minimum frequency

for this input ?

Thanks.

Regards,

VBotn