How Can I set up DMA operation with my own PC software application?

Maybe I can clear up a few things...

The descriptor tables are located in the system's host memory (also known as root complex memory or BFM Shared Memory). See figure 7-2 of the 8.0 PCIe Compiler User Guide. I'm not a software guy, but you will need to get the system to lock down that memory and give you the real physical memory address of it (not the virtual address the application would use). Same thing you need to do with the actual memory buffer data you want to transfer via DMA. The addresses in the descriptor table point to the data buffers to be transferred. The descriptor table entries are described by tables 7-6, 7-7 and 7-8.

Then you must write the real physical address of the descriptor table to the Descriptor Table Header registers which are offset from BAR2 (or BAR3:2) by the values shown in table 7-5. The Descriptor Table Header format is shown in tables 7-3, 7-4, and 7-5.

The Chaining DMA hardware will then read the Descriptor Table using MRd TLP's from the system host memory, using the address from the Descriptor Table Header register. The root complex hardware will automatically respond to the MRd TLP and return the data from the memory address. (huzj_ecc - your driver doesn't need to respond to the MRd TLP, in fact there is no way to do that, you just have to have the descriptor table locked down in memory and put the correct address in the Decriptor Table Header register.)

It does appear that the PCIe Compiler user guide is missing an important piece of information on how this is all setup. The organization of the actual descriptor table:

Byte Offset Field

0-13 Reserved

14-15 EPLAST

16-31 Descriptor# 1 (following format of tables 7-6, 7-7, and 7-8)

32-47 Descriptor# 2 (ditto)

48-63 Descriptor# 3 (ditto)

..... and so on for as many descriptors as specified by the "Size" field

in the descriptor table header register

I think the Descriptor Table must also be no more than 4KB in total size and can't cross a 4KB boundary.

The EPLAST field in the Descriptor Table is updated by the Chaining DMA hardware with the number of the last descriptor that was completed, when the hardware is enabled to do so by the EPLAST_ENA bit in the Descriptor Table Header register or the EPLAST_ENA bit in the actual descriptor.

heppermann - Yes, it looks like those steps you mentioned in the user guide are leftover from the previous simple DMA description.

I think I answered most of the questions with the above description. Please post any followups here. I will try to answer if I know the answer and when I can.