Help: Windows didn't assign Bar0 to PCie (address mapping is not correct)

Thank you! Dave,

Do you mean DDR2 is not connected to PCIe Hard IP, it is only connected to DMA? What is the differences between PCIe address and Avalon address? Isn't PCIe address also Avalon address since it often uses Avalon MM interface?

Also, do you have examples/more detailed documents about this?

Thank you very much!

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The BAR size will be reduced to whatever the common set of control registers requires.

Consider the following simple case. Lets say I have a DMA controller that has the following registers; 64-bit PCIe address, 32-bit Avalon (Qsys) address, direction (PCIe-to-Avalon or Avalon-to-PCIe), length in bytes, a control register and a status register. You need 7 32-bit registers to describe this. The minimum practical BAR size is about 256-bytes, but its more typical to use a page of the host memory, i.e., 4kB or 8kB.

You can program the DMA controller to move a block of data to or from any PCIe address (which includes the host memory) to an Avalon address, which includes your DDR memory.

Note how the host does not need to see the Avalon DDR memory, it is the DMA controller that needs to see those addresses.

Cheers,

Dave

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