Help! Implenting a Cmex S-functions into your FPGA

Thanks Dabuk,

Your hints realy helped me find some info online, but I am still running into some problems.

I have done as you said, created a black box using Subsystembuilder block in simulink using a vhdl file containing an entity block.

If you have the time i was hoping you could check if Ihave done the right thing. Basicaly Now signal compiler does convert to VHDL but fails on synthesis and fitting.

I am not to sure what the VHDL Entity file should contain. Does it only need and entity declaration or also an architecture?

If it does need an architecture how am i suppose to wire up the signals... I hope you reply i need desperate help and realy appreciate your response.

Regards,

Nadeem