Help! Implenting a Cmex S-functions into your FPGA

Firstly you don't mention it, but I assume you're talking about DSP Builder. Secondly it isn't possible to convert your s-function to VHDL since that would require a C to HDL tool with specific knowledge of simulink/matlab.

On the other hand you can create a "blackbox" subsystem containing your s-function and tell DSP Builder to use your own HDL file when it tries to generate the system. To do this you create a subsystem with HDL Input blocks directly connected to the inputs of the subsystem and HDL Output blocks connected to the outputs. You then create an HDL Entity block which will point to HDL File. You need to name HDL Input and Output blocks according to the port names in your HDL entity.

Then when you simulate, it will use your s-function but compilation will use your VHDL file.