Forum Discussion
HDMI IP Example Design On Arria 10 SoC Development Kit
- 5 years ago
Hi @Deshi_Intel ,
We have finally solved the problem by supporting auxiliary in qsys user interface of HDMI IP and generating the .sof file again.
Thank you for your support.
Regards,
Yıldız
Hi Yıldız,
One question - Does HDMI tx failed on certain video resolution only or complete failure across all video resolution ?
- May I know which Quartus version that you used ? Have you tried out latest Quartus version ?
- Are you using Quartus in Linux OS or Win OS ?
My concern is whether the HDMI example design is generated correctly or corrupted.
- Do you still have the HDMI example design generation log file ? Can you review the log file for potential warning message ?
- Have you validated the software folder in HDMI example design ? Is it generated correctly as this is the main software design that control HDMI Tx ?
Thanks.
Regards,
dlim
- YBilg5 years ago
New Contributor
Hi @Deshi_Intel ,
I am using Quartus 18.1 in Windows. We are going to use Quartus 19 as soon as we get the license.
Our HDMI source generates 1080p video, so we just tried for this resolution. Since the HDMI source and monitor support HDMI 1.4, on the TX part there is no need for SCDC communication. Also, we didnt enable scrambling because on HDMI 1.4. there is no scrambling. We have simulated the HDMI IP in Quartus 15 and Quartus 18.1 in this configuration. In Quartus 15, HDMI IP(version 15) generates r,g,b,c; but does not generate in Quartus 18.1. Firstly, we want to boot the IP in simulation, after that we will continue in hardware.
Regards,
Yıldız