amildm
Contributor
ContributorHDMI IP -> DRMI (Dynamic Range Mastering InfoFrame) -> how to derive?
Hi,
In the HDMI Sink, the DRMI packets are mapped to the Address 0x88 of the Auxiliary Packet Memory Map:
https://www.intel.com/content/www/us/en/docs/programmable/683798/22-1-19-7-0/sink-auxili...
You are referring to the Design Example for Arria 10, but I'm working with the Cyclone-10.
Instructions for Cyclone 10 DRMI Filtering are different:
but they are not compatible with the generated code...
The User Guide for Arria 10, which you are referring to, is compatible to the generated code, which I have in my project...
Anyway, I'll set the multiplexer_in0_valid signal to '0' according to your recommendation and let you know whether it works.
