Forum Discussion
ContributorHDMI IP -> DRMI (Dynamic Range Mastering InfoFrame) -> how to derive?
You are referring to the Design Example for Arria 10, but I'm working with the Cyclone-10.
Instructions for Cyclone 10 DRMI Filtering are different:
but they are not compatible with the generated code...
The User Guide for Arria 10, which you are referring to, is compatible to the generated code, which I have in my project...
Anyway, I'll set the multiplexer_in0_valid signal to '0' according to your recommendation and let you know whether it works.
Frequent ContributorHi amildm,
Good day.
We manage to replicate the error from our side using your design but I believe this error is due to the top module C10_HDMI_DRMI_DEX is not included in the rar file. The rar file just includes the hdmi_rx ip and project setting file.
However, we also manage to generate Intel example design from our side with no error.
Regarding to the aux_retransmit.v file, we have confirm with our internal team that this file only exist for HDMI2.1(FRL) design.
At this point of time, Cyclone 10 does not support FRL mode.
With that, I can conclude that Cyclone 10 does not support HDR filtering.
Thank you.
Best Regards,
ZulsyafiqH_Intel
amildmAs I mentioned in the beginning of the thread, I generated an Example Design of HDMI IF for Cyclone-10 and received the constant HDR values (1,2,3,4,5,...) as the metadata.
The answer, which I received in the thread, is so that these values (1,2,3,4,5,...) are due to the Filtering Mode of IP and I need to change parameters in the aux_retransmit.v file.
In the last post to the thread the answer was "Cyclone 10 does not support HDR filtering".
So, my question is very simple now: "what should I change in the HDMI IP Example Design for Cyclone-10 so it will pass through the incoming DRMI packets"?
Thank you
