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At first, you can try use the static design examples for simulation that are available in Quartus installation directory.
<install_dir>/ip/altera/altera_pcie/altera_pcie_a10_ed/example_design/a10
The driver is altpcietb_bfm_rp_gen3_x8.sv
try the ebfm_barwr_imm procedure which writes up to four bytes of data to an offset from the specified Endpoint BAR.
ebfm_barwr_imm(bar_table, bar_num, pcie_offset, imm_data, byte_len, tclass)
The ebfm_barrd_wait procedure reads a block of data from the offset of the specified Endpoint BAR and stores it in BFM shared memory.
ebfm_barrd_wait(bar_table, bar_num, pcie_offset, lcladdr, byte_len, tclass)
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As I mentioned, I'm not even getting to the point in the driver file where my own test code runs. I'm stuck in configuration at state L0. Strangely, I get to L0, then it goes through the recovery sub-state machine, and then back to L0, where I'm stuck. I found this, but editing the .qsys file didn't help:
https://www.altera.com/support/support-resources/knowledge-base/ip/2017/what-assignments-do-i-need-for-a-pcie-gen1--gen2-or-gen3-design-.html
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