Hi,
Were you able to solve your problem?
I have a similar-sounding issue with a Frame Reader connected to a UniPHY DDR2 controller via an MPFE.
I based the Qsys settings on Altera's UDX5 reference design, so I configured the Frame Reader to be 256-bits wide, with a 128-deep FIFO and using 64-beat bursts. The memory controller also has a 256-bit wide interface and a max burst size of 64.
Looking at the debug registers in the MPFE, it looks like the Frame Reader just stops reading data after a certain number of words (less than one frame). At the same time, the Clocked Video Out component that is connected to the Frame Reader is reporting an underflow condition.
Thanks for any help you can offer.