terry123
New Contributor
New Contributorfor intel fpga, avalon interconnect ip (equivalent axi interconnect ip in XILINX VIVADO)
Hi,
i was old user in xilinx fpga.
recently, i am studying intel fpga and i will use intel fpga.
what ip can be used for avalon interface interconnect ip which i can set number of master and a...
Hi Terry,
Check this https://community.intel.com/t5/Intel-SoC-FPGA-Embedded/How-to-connect2-Avalon-MM-masters-to-1-MM-slave/m-p/639952. I think don't have that particular IP like axi interconnect ip. Can directly connect those multiple avalon master to slave.
Yes, in Platform Designer (Qsys) you simply connect both masters to the same slave interface of the IP. You can do this in the Connections panel of the System Contents tab (clicking the correct dots) or select the slave interface there and open the Connections tab from the View menu and use the checkboxes there.
Best Regards,
Sheng
p/s: If any answer from community or Intel support are helpful, please feel free to mark as solution and give Kudos.
