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Sahil_Honeywell
New Contributor
New ContributorFIFO Simulation Modelsim Timing Error
Hi,
I am writing a simple test bench for 8-bit FIFO. During simulation in Modelsim, when the 'write_fifo' signal turns high, it becomes red (X). Everything else remains fine. The 'read_fifo' signa...
Sahil_HoneywellNew Contributor
New ContributorI figured this out. My test bench was wrong. I was triggering write signal instead of read signal in multiple processes. After correction it works fine now.
