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greenlantern01's avatar
greenlantern01
Icon for Occasional Contributor rankOccasional Contributor
2 years ago

FIFO Reset

Hello, I am currently using DE10 Standard FPGA along with DC2390 daughter card. Using DE10 Standard to capture the ADC data from the daughter card. After capturing this data the data is forwarded to...
Pcie
tehjingy_Altera's avatar
tehjingy_Altera
Icon for Regular Contributor rankRegular Contributor
2 years ago

Hi


The clock source is needed for the update of status register read and the input&output rate for the sink and source streaming.


For AVMM Agent Read and write, the rate of add and clearing the buffer will depends on the rate in which you read and write to the buffer.


Regards

Jingyang, Teh