New ContributorHello All,
I am using the FFT Intel FPGA IP , in variable streaming mode. The tool version is Intel Quartus Prime pro 21.4 .
As soon as the rst_n is high the sink ready signal is going to 'X' state.
How to resolve this issue?
Frequent ContributorHi,
Please refer 3.2.1. Fixed-Point Variable Streaming FFTs (intel.com) especially, "For the first 8 clock cycles, the samples are fed unmodified through the butterfly unit to the delay feedback unit".
Also, please make sure, you are asserting and de-asserting sink_valid correctly as mentioned in the UG 3.4.2.4. Enabling the Variable Streaming FFT (intel.com).
Thank you
Kshitij Goel
Frequent ContributorHi,
As we do not receive any response from you on the previous reply that we have provided. Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.
Thank you,
Kshitij Goel
