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Altera_Forum
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17 years ago

FFT 8.0, sink_ready de-asserted

Hi, I am trying to test the functionality of FFT version 8.0. The device family that I am using is Cyclone II. Below is the parameter of the FFT: Transform Length: 64 points Data Preci...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

what does the input clock look like? is it running at the same speed as the imaginary data is changing, or the real data?

leaving source_ready asserted all the time is legal but i don't think it will solve your problem.

i simulated an FFT core with your settings in Quartus 8.0 SP1 using Altera's testbench and i got the expected results.