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Altera_Forum
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13 years ago

Fatal: (vsim-4) when trying to use SDRAM Controller Generic Memory Model

I'm trying to simulate a Qsys system with a Nios II processor running code from an external SDRAM, with Modelsim ASE. In order to get a simple RTL simulation, I would like to use the Altera Generic M...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

Till now, I could see that the problem is in the file my_qsys_system_tb_main_memory_my_partner.vhd (where my_qsys_system is the name of my Qsys system and main_memory is the name of the SDRAM controller istance in it). Modelsim ASE goes out of memory when trying to load this VHDL, which seems to serve as the initializer for the SDRAM functional model.

First of all, the name of the initialization file (.dat) was not correct so I corrected it with the memory file generated by Nios II SBT. Anyway, Modelsim ASE still fails and I can't find why.

Still working on it, any help would be greatly appreciated!

Regards,

Lorenzo