Failing to run on hardware Nios II

Dear Sheng,

When I don't include altmemphy DDR2 IP in my design, I can create Small Hello World or any other application and it works. I see the "Hello world from Nios II!" at the nios console in eclipse. Same reset signal, clk32 as clock, same jtag uart, same on-chip ram.

When I use DDR2 IP, I feed clk32 to the DDR2 IP. And it gives sysclk clock to prevent from metastability and cdc issues. So My system works with 62.5 sysclk. But nothing work. So either the system in reset or the ip in reset and doesn't give clock. I gave fixed '1' in top module since it is an active low reset and nothing changed. I changed it to '0' and nothing changed. I tried to do the same thing with sopcbuilder since it connects reset signals itself and nothing changed.

I checked the external clock and reset circuit. It is ok. Simple push button reset that connects the pin to the ground when clicked. Otherwise pulled-up to 3.3V. Clock signal is fixed 32.768 Mhz.

I share my pin assignments because there must be something that causes the IP to behave like that. I also share my top module.

Should I open a premium support account? Altera FPGAs are used in a lot of old design like this one.

Thanks in advance.
Best Regards.