Forum Discussion
EdCz
New Contributor
5 months agoF-Tile xcvr placement on DK-DEV-AGF023FA
I have an Agilex 7 FPGA F-Series Development Kit 2xF-Tile DK-DEV-AGF023F. I have 1 F-Tile working with PCIe Gen4x16, and want to use the second for 400Gb Ethernet. I have used the F-Tile channel p...
EdCz
New Contributor
5 months agoYes, The 400G uses the FGT Quad2 and Quad 3 (Bank 12C), with the ref clock #6 as REFCLK_FGTL12C_Q3_RX_CH6P. The schematic calls this out very nicely on page 20. I am able to verify these assignment with the Tile Interface Planner.
Ed.
RongY_altera
Contributor
5 months agoUsing Q24.3.1 Pro to generate a FGT 400Gx8 example design and do migration to your target Dev Kit. The project can pass compilation.
I suggest you create the example design based on the current Quartus version you're using, rather than upgrading a project created by another version.

Regards,
Rong