Forum Discussion
Hi,
Apologize for late reply.
- If refer to latest release note of Arria 10 and Cyclone 10 for Quartus 20.4
- https://www.intel.com/programmable/technical-pdfs/683487.pdf
- You can enable the Root Port mode using the parameter editor.
- The Root Port supports basic simulation and compilation.
- However, the Root Port is not fully verified. You may find functional problems in the current release.
If referring to In Intel® Arria® 10 and Intel® Cyclone® 10 GX Avalon® Streaming Interface for PCI Express User Guide version 18.0
in table 11 for System Setting it is mentioned that Root Port mode only supports the Avalon-MM interface type.
https://www.intel.com/programmable/technical-pdfs/683647.pdf
If you need basic simulation and compilation, you may try to use it. For full function, you are advised to use the AVMM interface type.
For detail for pipe interface and how to implement it, you may refer official release demo video at the link below
https://www.youtube.com/watch?v=vprh7j0o8ks&ab_channel=IntelFPGA
Hope this answer your question,
Regards,
Wincent_Intel
Thank you for your input
- My doubts are still not solved because in table 3 it is clearly mentioned that Root Portis is supported for PCIe Hard IP for Avalon streaming interface.
- But in table 11 of the system setting it is mentioned that Root Port mode only supports the Avalon-MM interface type.
So, My question is whether PCIe Hard IP for Avalon streaming interface as Root Port mode is not supported in the example design or is it not supported as full function.
Please give your input as soon as possible.