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Mikhail_a's avatar
Mikhail_a
Icon for Occasional Contributor rankOccasional Contributor
3 years ago

Ethernet 100g cant be placed at the location on Agilex 7 FPGA

Hello When synthesis design for AGIB027R31B1E1VAA that contains F-Tile Ethernet Intel FPGA on Intel Agilex ® 7 FPGA I-Series Transceiver-SoC Development Kit I got the next error: The specified bl...
ZiYing_Intel's avatar
ZiYing_Intel
Icon for Frequent Contributor rankFrequent Contributor
3 years ago

Hi redst,


I think you might use the wrong Quad in this case. You are suggested to use the f-tile-channel-placement tool before do the pin assignment for the Quad. Different topology will show different available Quad.


Best regards,

Zi Ying