Forum Discussion
saranya
New Contributor
5 years agoError while adding avalon signals in signal tap.
Beginner here.
Trying to learn pcie.
I have configured pcie(qsys) with 1 lane and gen2 speed.I have developed a test code,where 256 bytes of data were read and written from/to fpga through pcie. ...
CheepinC_altera
Regular Contributor
5 years agoHi,
As I understand it, it has been some time since I last heard from you. This thread will be transitioned to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.