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saranya's avatar
saranya
Icon for New Contributor rankNew Contributor
5 years ago

Error while adding avalon signals in signal tap.

Beginner here. Trying to learn pcie. I have configured pcie(qsys) with 1 lane and gen2 speed.I have developed a test code,where 256 bytes of data were read and written from/to fpga through pcie. ...
CheepinC_altera's avatar
CheepinC_altera
Icon for Regular Contributor rankRegular Contributor
5 years ago

Hi,


Thanks for your update. To facilitate the debugging, you can try to add signals to signaltap batch by batch to narrow down which signal is causing the problem. You may then share with me your test design + STP when the problem start to happen.


Please let me know if there is any concern. Thank you.