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saranya's avatar
saranya
Icon for New Contributor rankNew Contributor
5 years ago

Error while adding avalon signals in signal tap.

Beginner here. Trying to learn pcie. I have configured pcie(qsys) with 1 lane and gen2 speed.I have developed a test code,where 256 bytes of data were read and written from/to fpga through pcie. ...
CheepinC_altera's avatar
CheepinC_altera
Icon for Regular Contributor rankRegular Contributor
5 years ago

Hi,


Based on the error messages, it seems to be related to the transceiver ports of your PCIe instances not properly connected to transceiver pins. Just would like to check with you if you observe similar compilation error messages without using Signaltap?


Please let me know if there is any concern. Thank you.


  • saranya's avatar
    saranya
    Icon for New Contributor rankNew Contributor
    5 years ago

    Hi,

    Thanks for your help.

    No ,I'm not getting those compilation error messages without using signaltap.