Forum Discussion
Altera_Forum
Honored Contributor
17 years agoAfter the reducing and optimizing the algorithms, the project can be compiled but there are now two error messages during the Fitting with the Signal Compiler:
Error: Design contains 48306 blocks of type combinational node. However, device contains only 39600. Error: Can't fit design in device The project still seems to be too big for the Device EP3C40F484C7. The required number of LE is 48,549. This is shown in the Compilation Report after Synthesis process in Quartus II.