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Murali_kumar's avatar
Murali_kumar
Icon for Occasional Contributor rankOccasional Contributor
4 years ago

Error (12154): Can't elaborate inferred hierarchy "sld_hub:auto_hub"

Hi all, I am facing the following issue while compiling the design with parallel flash loader II IP.

Error (11176): C:\Users\murali.kumar\Desktop\OLD_SIM\learn\sim\pfl_design\db\ip\slde564a3bb\alt_sld_fab_wrapper_hw.tcl: There is an unnamed component definition in the file: C:/Users/murali.kumar/Desktop/OLD_SIM/learn/sim/pfl_design/db/ip/slde564a3bb/alt_sld_fab_wrapper_hw.tcl. Please see the command set_module_property NAME Error
(11176): No component alt_sld_fab in C:/Users/murali.kumar/Desktop/OLD_SIM/learn/sim/pfl_design/db/ip/slde564a3bb/alt_sld_fab_wrapper_hw.tcl Error
(12154): Can't elaborate inferred hierarchy "sld_hub:auto_hub"
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 3 errors, 1 warning
Error: Peak virtual memory: 4801 megabytes Error: Processing ended: Sat Sep 25 13:48:11 2021
Error: Elapsed time: 00:00:36
Error: Total CPU time (on all processors): 00:01:43
Error (293001): Quartus Prime Full Compilation was unsuccessful. 5 errors, 1 warning Kindly help me to solve the issue...

Thanks and Regards Murali_kumar

7 Replies

    • Murali_kumar's avatar
      Murali_kumar
      Icon for Occasional Contributor rankOccasional Contributor
      4 years ago
      Hi,
      I have selected a MAX V device and working in quarts prime lite 20.01.1
  • YuanLi_S_Intel's avatar
    YuanLi_S_Intel
    Icon for Regular Contributor rankRegular Contributor
    4 years ago

    Hi, i tried to compile the design with PFL II IP. No issue on my side. Do you instantiate the IP properly? Also, add the IP into the project directory properly?


    • Murali_kumar's avatar
      Murali_kumar
      Icon for Occasional Contributor rankOccasional Contributor
      4 years ago
      Hi,

      Yes I have added the Ip files and instantiated properly. But still it was shown the same.

  • YuanLi_S_Intel's avatar
    YuanLi_S_Intel
    Icon for Regular Contributor rankRegular Contributor
    4 years ago

    Can you try to create new design and put only the PFL II IP in it? Just want to isolate the root cause.


    • Murali_kumar's avatar
      Murali_kumar
      Icon for Occasional Contributor rankOccasional Contributor
      4 years ago
      Yes,
      I have tried only with this IP and still facing the same issue.
      Is there any simple example design to compare with mine.

      Thanks
      Murali
  • YuanLi_S_Intel's avatar
    YuanLi_S_Intel
    Icon for Regular Contributor rankRegular Contributor
    4 years ago

    do you enable signal tap? Error (12154): Can't elaborate inferred hierarchy "sld_hub:auto_hub", sld_hub looks like signal tap related component. Can you try to create new project with only the IP instantiated? just want to isolate the issue.