Forum Discussion
BVola
New Contributor
6 years agoError 12006 when compiling clock buffer
I have a design instantiating two clock buffers (ALTIOBUF). The design synthesizes fine in Synplify Pro, but when I compile the netlist in Quartus Prime Lite, I get the error: Error (12006): Node ins...
BVola
New Contributor
6 years agoApparently, I don't need to instantiate clock buffers; the tool automatically adds them. Is that correct?