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NalexFPGA's avatar
NalexFPGA
Icon for New Contributor rankNew Contributor
3 years ago

EMIF IP throwing error,Stratix 10

A design with DDR4 needs to be tested. For this I used EMIF IP as a controller for the DDR4.But when I tried to synthesise the project I got this error Error(20181): The permit_cal input port of IO...
AdzimZM_Altera's avatar
AdzimZM_Altera
Icon for Regular Contributor rankRegular Contributor
3 years ago

As we do not receive any response from you on the previous reply that we have provided. Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.