NalexFPGANew Contributor3 years agoEMIF IP throwing error,Stratix 10 A design with DDR4 needs to be tested. For this I used EMIF IP as a controller for the DDR4.But when I tried to synthesise the project I got this error Error(20181): The permit_cal input port of IO...Show More
AdzimZM_AlteraRegular Contributor3 years agoHi NalexFPGA,May I know any update from your end?Regards,Adzim
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