Forum Discussion
NalexFPGA
New Contributor
3 years agoEMIF IP throwing error,Stratix 10
A design with DDR4 needs to be tested. For this I used EMIF IP as a controller for the DDR4.But when I tried to synthesise the project I got this error
Error(20181): The permit_cal input port of IO...
AdzimZM_Altera
Regular Contributor
3 years agoHi NalexFPGA,
May I know any update from your end?
Regards,
Adzim