Forum Discussion
gcohe5
New Contributor
6 years agoemif burst size configuration
hi I'm using a Arria 10 development kit with a DDR4 memory. I want to enable a burst size of 1024 (the maximum the avalon bridge ip allows). The EMIF connected to the HPS is configured to burst s...
gcohe5
New Contributor
6 years agohi
thank you for the answer.
I tried reducing the burst size on the avalon MM bridges (Avalon MM Pipeline bridge IP) to 128 and 64, both did not work (when trying to read, the 'waitreq' asserts and stays high).
from what I understood from your answer this should work (when burst size was '1' it worked).
any ideas what may be the issue?
I'm working with data_size of 64 bit does that have any impact?
thanks